I made some changes to the circuit diagram. In order to generate proper net list, I replaced labels connected to CPU bus with labels connected to buffered I/O bus in slot #4. I included detailed comments on the diagram drawing. The UART card of course can be connected to any I/O slot or directly to the CPU card, with proper programming changes. The concept is explained in design document that I referenced earlier in this blog.
I also corrected PCB layout as I missed two components when I updated it last time: jumper JP8 and resistor R7.
I started to assemble the board, it should be finished soon. I made most of the GND connections for now. Updated circuit diagram, PCB layout and pictures of the board are included below.